The Leading-Edge Lead (2nm / 3nm)Wide moat

TSMC (TSM) — moat facet

First to the hardest nodes, where all the value concentrates.

TSMC's most valuable position is its command of the very leading edge — the newest, smallest, most difficult process nodes, currently 3-nanometer in high-volume production and 2-nanometer ramping. These nodes are where the most advanced and profitable chips are built, and TSMC gets there first and at production-worthy yields, which is precisely what the most demanding customers require. In the second quarter of 2026, 3-nanometer and 5-nanometer technologies together made up the majority of wafer revenue1, with 2-nanometer beginning its ramp — a mix no competitor can come close to matching.

Wafer revenue by node, June 2026 quarter5nm — 33%3nm — 30%7nm — 11%2nm — 3%16-28nm — 12%40nm and older — 11%TSMC 2Q26 management report; 7nm and below were 77% of wafer revenue
3nm and 5nm made 63% of wafer revenue in the June 2026 quarter, and 2nm booked its first 3%.

Being first to each leading node is the linchpin of the whole moat. The designers of flagship processors and AI accelerators plan their products years ahead around the best process that will be available, and that is reliably TSMC's — so the highest-value business flows to TSMC first, at the best prices, before anyone else can offer a comparable node. This first-mover position at the leading edge is not a small share advantage; it is near-exclusivity on the chips that matter most, renewed with every generation, and it is the reason TSMC captures the lion's share of the industry's most attractive economics.

Moat trajectory: Widening

Widening. First to 3nm at volume and ramping 2nm ahead of anyone, TSMC keeps renewing its near-exclusivity on the highest-value chips with every generation.

The number that tests this moat
Moat Explorer calc
3nm and 5nm combined share of wafer revenue
60% in 2025 (24% and 36%)

The two most advanced nodes in volume already carry most of the revenue, with 2nm entering production. Their combined share rising as 2nm ramps says the lead keeps converting into revenue.

How it's calculated: 3-nanometer (24%) plus 5-nanometer (36%) shares of 2025 wafer revenue.
Source: TSMC Form 20-F, FY2025 ↗
⚠ Threats to the moat
References
  1. ReportedQ2 2026: 3nm + 5nm made up the majority of wafer revenue, with 2nm ramping.
    TSMC 2Q26 Quarterly Management Report (net revenue US$40.20B / NT$1,270.38B, +36.0%; gross margin 67.7%; 2nm 3%, 3nm 30%, 5nm 33%, 7nm 11% of wafer revenue, 7nm and below 77%; HPC 66% of net revenue; China 6% of net revenue; capex US$15.70B) — 2Q26 · publ. July 16, 2026 · source ↗
Sources
Generated September 23, 2026